Gold coated Si wafers and Si chips

Nano-Tec gold coated silicon wafers and chips are useful for thin film research, AFM / SPM, nanotechnology and biotechnology applications. The silicon wafers and chips are coated with pure gold over an adhesion layer of chromium. Both chromium and gold are deposited in a dedicated high vacuum deposition system with electron beam (EB) evaporation sources. The gold coating is not atomically flat; there are height differences in the nanometre range. The maximum use temperature is around 175°C; higher temperatures may result in delamination of the gold film. The standard coating thickness is 50nm gold with a 5nm chromium adhesion layer. Also available are gold coatings with a thickness of 10, 100 and 500 nm.
Available in three silicon wafer sizes: Ø2”/51mm, 3”/76mm and Ø4”/100mm and Si chips 10 x 10mm (diced from a 4”/100mm). Nano-Tec gold coated wafers are individually packed in wafer carrier trays for protection. Nano-Tec gold coated silicoe chips are packed in A Gel-Pak box.

Specifications of gold coated silcon wafers and chips:

Gold coating
Coating film Au, 99.999% purity	50 nm	10 nm	100nm	500nm
Adhesion film Cr, 99.98% purity	5 nm	2 nm	5 nm	7.5 nm
Surface roughness	Several nm

Silicon wafer substrate
Si substrate orientation	<100>
Si wafer Type	P (Boron) with one primary flat
Resistance	1-30 Ohm/cm
Si wafer size	Ø 2”/51 mm	Ø3”/76mm	Ø4”/100mm	10 x 10 mm
Si wafer thickness	275µm (+/- 25µm)	381µm (+/- 25µm)	525µm (+/- 20µm)	525µm (+/- 20µm)
TTV	=< 20µm	=< 20µm	=< 20µm	n.a.
Primary flat	15.9 +/- 1.65mm	22.2 +/- 3.17mm	32.5 +/- 2.5mm	n.a.